MB85RS512TPNF-G-JNERE1 FeRAM 512K SPI

Description

■ DESCRIPTION

MB85RS512TPNF-G-JNERE1 is a FRAM (Ferroelectric Random Access Memory) chip in a configuration of 65,536 words x 8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells.

MB85RS512T adopts the Serial Peripheral Interface (SPI).

The MB85RS512T is able to retain data without using a back-up battery, as is needed for SRAM.

The memory cells used in the MB85RS512T can be used for 1013 read/write operations, which is a significant improvement over the number of read and write operations supported by Flash memory and EEPROM.

MB85RS512T does not take long time to write data like Flash memories or E2PROM, and MB85RS512T

takes no wait time.

■ FEATURES

• Bit configuration : 65,536 words x 8 bits
• Serial Peripheral Interface : SPI (Serial Peripheral Interface)

Correspondent to SPI mode 0 (0, 0) and mode 3 (1, 1)

• Operating frequency : 1.8 V to 2.7 V, 25 MHz (Max)

2.7 V to 3.6 V, 30 MHz (Max)

For FSTRD command 2.7 V to 3.6 V, 40 MHz (Max)

• High endurance : 1013 times / byte
• Data retention : 10 years (+85 ℃), 95 years ( + 55 ℃), over 200 years ( + 35 ℃)
• Operating power supply voltage : 1.8 V to 3.6 V
• Low power consumption : Operating power supply current 6 mA ([email protected] MHz)

10 mA ([email protected] MHz)

Standby current 120 uA (Max)

Sleep current 10 uA (Max)

• Operation ambient temperature range : -40 ℃ to +85 ℃
• Package : 8-pin plastic SOP

RoHS compliant